显示原理与VGA原理类似。
使用屏幕为800*480分辨率，对应的时序参数如下：

行显示时序如下图：

列显示时序与行显示时序类似。

source code

`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company: 
// Engineer: 
// 
// Create Date: 2023/05/05 15:06:26
// Design Name: 
// Module Name: lcd
// Project Name: 
// Target Devices: 
// Tool Versions: 
// Description: 
// 
// Dependencies: 
// 
// Revision:
// Revision 0.01 - File Created
// Additional Comments:
// 
//////////////////////////////////////////////////////////////////////////////////


module lcd(
    input sys_clk, //系统时钟
    input sys_rst_n, //系统复位
//RGB LCD 接口
    output lcd_de, //LCD 数据使能信号
    output lcd_hs, //LCD 行同步信号
    output lcd_vs, //LCD 场同步信号
    output lcd_bl, //LCD 背光控制信号
    output lcd_clk, //LCD 像素时钟
    output lcd_rst, //LCD 复位
    output reg [23:0] lcd_rgb //LCD RGB888 颜色数据
);  
parameter hang_num=1056;
parameter lie_num=525;
parameter hang_sync=128;
parameter lie_sync=2;
parameter hang_after=88;
parameter lie_after=33;
parameter hang_display=800;
parameter lie_display=480;
parameter WHITE = 24'hFFFFFF; //白色
parameter BLACK = 24'h000000; //黑色
parameter RED = 24'hFF0000; //红色
parameter GREEN = 24'h00FF00; //绿色
parameter BLUE = 24'h0000FF; //蓝色
reg [10:0] hang_count;
reg [9:0] lie_count;
assign lcd_de=(hang_count>=hang_sync+hang_after)&& 
        (hang_count<=hang_sync+hang_after+hang_display)&& 
        (lie_count>=lie_sync+lie_after)&& 
        (lie_count<=lie_sync+lie_after+lie_display);
assign lcd_hs = hang_count > hang_sync;
assign lcd_vs = lie_count > lie_sync;
assign lcd_rst = 1;
assign lcd_bl = 1;
assign lcd_clk = sys_clk;
always @(posedge sys_clk or negedge sys_rst_n) begin
    if(!sys_rst_n)
    begin
      hang_count<=11'd0;
      lie_count<=10'd0;
    end
    else 
    begin
        if(hang_count==hang_num-1)
        begin
            hang_count<=0;
            if(lie_count==lie_num-1)lie_count<=0;
            else lie_count<=lie_count+1;
        end
        else hang_count=hang_count+1;
        case(hang_count)
            hang_display/5+hang_sync+hang_after: lcd_rgb<=WHITE;
            hang_display/5*2+hang_sync+hang_after: lcd_rgb<=BLACK;
            hang_display/5*3+hang_sync+hang_after: lcd_rgb<=RED;
            hang_display/5*4+hang_sync+hang_after: lcd_rgb<=GREEN;
            hang_sync+hang_after: lcd_rgb<=BLUE;
            default:;
        endcase
    end
end
endmodule

xdc文件

set_property -dict {PACKAGE_PIN U18 IOSTANDARD LVCMOS33} [get_ports sys_clk]
set_property -dict {PACKAGE_PIN N16 IOSTANDARD LVCMOS33} [get_ports sys_rst_n]
set_property -dict {PACKAGE_PIN W18 IOSTANDARD LVCMOS33} [get_ports {lcd_rgb[0]}]
set_property -dict {PACKAGE_PIN W19 IOSTANDARD LVCMOS33} [get_ports {lcd_rgb[1]}]
set_property -dict {PACKAGE_PIN R16 IOSTANDARD LVCMOS33} [get_ports {lcd_rgb[2]}]
set_property -dict {PACKAGE_PIN R17 IOSTANDARD LVCMOS33} [get_ports {lcd_rgb[3]}]
set_property -dict {PACKAGE_PIN W20 IOSTANDARD LVCMOS33} [get_ports {lcd_rgb[4]}]
set_property -dict {PACKAGE_PIN V20 IOSTANDARD LVCMOS33} [get_ports {lcd_rgb[5]}]
set_property -dict {PACKAGE_PIN P18 IOSTANDARD LVCMOS33} [get_ports {lcd_rgb[6]}]
set_property -dict {PACKAGE_PIN N17 IOSTANDARD LVCMOS33} [get_ports {lcd_rgb[7]}]
set_property -dict {PACKAGE_PIN V17 IOSTANDARD LVCMOS33} [get_ports {lcd_rgb[8]}]
set_property -dict {PACKAGE_PIN V18 IOSTANDARD LVCMOS33} [get_ports {lcd_rgb[9]}]
set_property -dict {PACKAGE_PIN T17 IOSTANDARD LVCMOS33} [get_ports {lcd_rgb[10]}]
set_property -dict {PACKAGE_PIN R18 IOSTANDARD LVCMOS33} [get_ports {lcd_rgb[11]}]
set_property -dict {PACKAGE_PIN Y18 IOSTANDARD LVCMOS33} [get_ports {lcd_rgb[12]}]
set_property -dict {PACKAGE_PIN Y19 IOSTANDARD LVCMOS33} [get_ports {lcd_rgb[13]}]
set_property -dict {PACKAGE_PIN P15 IOSTANDARD LVCMOS33} [get_ports {lcd_rgb[14]}]
set_property -dict {PACKAGE_PIN P16 IOSTANDARD LVCMOS33} [get_ports {lcd_rgb[15]}]
set_property -dict {PACKAGE_PIN V16 IOSTANDARD LVCMOS33} [get_ports {lcd_rgb[16]}]
set_property -dict {PACKAGE_PIN W16 IOSTANDARD LVCMOS33} [get_ports {lcd_rgb[17]}]
set_property -dict {PACKAGE_PIN T14 IOSTANDARD LVCMOS33} [get_ports {lcd_rgb[18]}]
set_property -dict {PACKAGE_PIN T15 IOSTANDARD LVCMOS33} [get_ports {lcd_rgb[19]}]
set_property -dict {PACKAGE_PIN Y17 IOSTANDARD LVCMOS33} [get_ports {lcd_rgb[20]}]
set_property -dict {PACKAGE_PIN Y16 IOSTANDARD LVCMOS33} [get_ports {lcd_rgb[21]}]
set_property -dict {PACKAGE_PIN T16 IOSTANDARD LVCMOS33} [get_ports {lcd_rgb[22]}]
set_property -dict {PACKAGE_PIN U17 IOSTANDARD LVCMOS33} [get_ports {lcd_rgb[23]}]
set_property -dict {PACKAGE_PIN N18 IOSTANDARD LVCMOS33} [get_ports lcd_hs]
set_property -dict {PACKAGE_PIN T20 IOSTANDARD LVCMOS33} [get_ports lcd_vs]
set_property -dict {PACKAGE_PIN U20 IOSTANDARD LVCMOS33} [get_ports lcd_de]
set_property -dict {PACKAGE_PIN M20 IOSTANDARD LVCMOS33} [get_ports lcd_bl]
set_property -dict {PACKAGE_PIN P19 IOSTANDARD LVCMOS33} [get_ports lcd_clk]
set_property -dict {PACKAGE_PIN L17 IOSTANDARD LVCMOS33} [get_ports lcd_rst]

仿真文件

`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company: 
// Engineer: 
// 
// Create Date: 2023/05/05 15:56:56
// Design Name: 
// Module Name: lcd_test
// Project Name: 
// Target Devices: 
// Tool Versions: 
// Description: 
// 
// Dependencies: 
// 
// Revision:
// Revision 0.01 - File Created
// Additional Comments:
// 
//////////////////////////////////////////////////////////////////////////////////

module lcd_test;
reg sys_rst_n;
reg sys_clk;
wire lcd_de; //LCD 数据使能信号
wire lcd_hs; //LCD 行同步信号
wire lcd_vs; //LCD 场同步信号
wire lcd_bl; //LCD 背光控制信号
wire lcd_clk; //LCD 像素时钟
wire lcd_rst; //LCD 复位
wire [23:0] lcd_rgb; //LCD RGB888 颜色数据
initial begin
    sys_rst_n = 1;
    #1 sys_rst_n = 0;
    #4 sys_rst_n = 1;
    sys_clk = 0;
    forever begin
        #2 sys_clk=~sys_clk;
    end
end
lcd lcd1(sys_clk, //系统时钟
    sys_rst_n, //系统复位
    lcd_de, //LCD 数据使能信号
    lcd_hs, //LCD 行同步信号
    lcd_vs, //LCD 场同步信号
    lcd_bl, //LCD 背光控制信号
    lcd_clk, //LCD 像素时钟
    lcd_rst, //LCD 复位
    lcd_rgb
);
endmodule