牛客进阶题目3：不重叠序列检测

还是移位寄存器，加一个计数器来限制周期

题目要求状态机，懒得画了，移位寄存器可根据时序图直接写

`timescale 1ns/1ns
module sequence_detect(
	input clk,
	input rst_n,
	input data,
	output reg match,
	output reg not_match
	);
reg [5:0] seq_shift ;
reg [2:0] seq_count	;

always @(posedge clk or negedge rst_n) begin
	if(!rst_n)
		seq_count <= 'd0 ;
	else if(seq_count == 3'd5)
		seq_count <= 'd0 ;
	else
		seq_count <= seq_count + 1 ;
end
always @(posedge clk or negedge rst_n) begin
	if(!rst_n)
		seq_shift <= 'd0 ;
	else if(seq_count == 3'd5)
		seq_shift <= {5'b0,data} ;
	else
		seq_shift <= {seq_shift[4:0],data};
end
always @(posedge clk or negedge rst_n) begin
    if(!rst_n) begin
            match=1'b0;
            not_match = 1'b0;
    end
    else if(seq_count == 3'd5 && {seq_shift[4:0],data}==6'b011100) begin
		match <= 1'b1 ;
		not_match <= 1'b0 ;
	end
	else if(seq_count == 3'd5 && {seq_shift[4:0],data}!=6'b011100) begin
		match <= 1'b0 ;
		not_match <= 1'b1 ;
	end
	else begin
		match <= 1'b0 ;
		not_match <= 1'b0 ;
	end

end


endmodule