牛客进阶题目17：任意小数分频（重点）

此题无思路，抄一个题解在这

`timescale 1ns/1ns

module div_M_N(
 input  wire clk_in,
 input  wire rst,
 output reg clk_out
);
parameter M_N = 8'd87; 
parameter c89 = 8'd24; // 8/9时钟切换点
parameter div_e = 5'd8; //偶数周期
parameter div_o = 5'd9; //奇数周期
//*************code***********//
reg [6:0]   cnt_87  ;
reg [2:0]   cnt_8   ;
reg [3:0]   cnt_9   ;

always @(posedge clk_in or negedge rst) begin
    if(!rst)
        cnt_87 <= 'd0 ;
    else if(cnt_87 == (M_N - 1))
        cnt_87 <= 'd0 ;
    else
        cnt_87 <= cnt_87 + 1 ;
end

always@(posedge clk_in or negedge rst) begin
    if(!rst)
        cnt_8 <= 'd0;
    else if(cnt_87 < c89)
        cnt_8 <= (cnt_8==div_e-1) ? 'd0 : cnt_8 + 1 ;
    else
        cnt_8 <= 'd0 ;
end
always@(posedge clk_in or negedge rst) begin
    if(!rst)
        cnt_9 <= 'd0;
    else if(cnt_87 >= c89)
        cnt_9 <= (cnt_9==div_o-1) ? 'd0 : cnt_9 + 1 ;
    else
        cnt_9 <= 'd0 ;
end


always @(posedge clk_in or negedge rst) begin
    if(!rst)
        clk_out <= 1'b0 ;
    else if(cnt_87 < c89) begin
        if(cnt_8 == div_e/2||(cnt_8==0))
            clk_out <= ~clk_out ;
        else
            clk_out <= clk_out ;
    end
     else if(c89 <= cnt_87 < M_N) begin
        if(cnt_9 == (div_o-1)/2||(cnt_9==0))
            clk_out <= ~clk_out ;
        else
            clk_out <= clk_out ;
    end 
    else
        clk_out <= 1'b0 ;
end  

//*************code***********//
endmodule