知识点
always @(*)
case(sel)
2'b00: begin
sout_t = p0 ;
end
2'b01: sout_t = p1 ;
2'b10: sout_t = p2 ;
default: sout_t = p3 ;
endcase
第一次
回答
module top_module(
input [15:0] a, b, c, d, e, f, g, h, i,
input [3:0] sel,
output [15:0] out );
always @(*)
case(sel)
3'd0: out[15:0] = a[15:0];
3'd1: out[15:0] = b[15:0];
3'd2: out[15:0] = c[15:0];
3'd3: out[15:0] = d[15:0];
3'd4: out[15:0] = e[15:0];
3'd5: out[15:0] = f[15:0];
3'd6: out[15:0] = g[15:0];
3'd7: out[15:0] = h[15:0];
3'd8: out[15:0] = i[15:0];
default:out[15:0] = 16'hffff;
endcase
endmodule
结果
Warning (15610): No output dependent on input pin "i[0]" File: /home/h/work/hdlbits.8402616/top_module.v Line: 2
Warning (15610): No output dependent on input pin "i[1]" File: /home/h/work/hdlbits.8402616/top_module.v Line: 2
Warning (15610): No output dependent on input pin "i[2]" File: /home/h/work/hdlbits.8402616/top_module.v Line: 2
[13 more]
第二次
回答
module top_module(
input [15:0] a, b, c, d, e, f, g, h, i,
input [3:0] sel,
output [15:0] out );
always @(*)
case(sel)
4'd0: out[15:0] = a[15:0];
4'd1: out[15:0] = b[15:0];
4'd2: out[15:0] = c[15:0];
4'd3: out[15:0] = d[15:0];
4'd4: out[15:0] = e[15:0];
4'd5: out[15:0] = f[15:0];
4'd6: out[15:0] = g[15:0];
4'd7: out[15:0] = h[15:0];
4'd8: out[15:0] = i[15:0];
default:out[15:0] = 16'hffff;
endcase
endmodule
结果
Status: Success!
标签:15,Mux9to1v,HDLBits,top,module,问题,input,sel,out
From: https://www.cnblogs.com/ptzcarl/p/16913729.html