Sigrity OptimizePI Post-Layout Analysis模式如何对PDS系统进行电容统计分析操作指导-Statistical Analysis

标签：界面 OptimizePI 阻抗 点击 Analysis 电容 Layout

Sigrity OptimizePI Post-Layout Analysis模式如何对PDS系统进行电容统计分析操作指导-Statistical Analysis

下面介绍使用Sigrity OptimizePI Post-Layout Analysis中的Statistical模式进行电容公差的统计分析，统计分析就是分析电容的Upper和Lower Tol公差对于阻抗的影响.分别得到upper和lower tol的阻抗结果和无公差阻抗结果进行比较

仍然以下图为例进行说明

附带目标阻抗S参数文件

电容的S参数文件

具体操作如下

1. 首先打开Optimize PI软件

1. 开启后界面如下，点击Workspace，New，新建一个workspace界面

1. 弹出模式选择界面，本例中需要进行电容配置优化分析，所以选择Post-Layout Analysis模式，点击ok

1. 新生成的workspace界面如下

1. 点击Load New /Different Layout，加载layout文件

1. 弹出Attach Layout File界面，选择Load an existing layout，加载已经存在的layout文件，点击ok

1. 弹出文件选择界面，选择本例中的demo_OPI.spd文件，点击打开

1. layout文件加载进来界面如下

1. 回到workflow界面，点击Load/Edit Capacitor Library，加载电容库

1. 弹出模型管理界面

1. 点击Discrete，选择Capacitor，点击New Library，加载电容模型

1. 点击上方的Load Library File，加载库文件

1. 弹出文件选择界面，选择刚才准备好的demo_decap_library.xml文件，点击打开

Xml文件就是电容S参数的向导，让Optimize PI软件能够读取电容的S参数文件

1. 电容库加载进来的结果如下

1. 点击window，layout view，切换回layout视图

1. 点击Check Stackup，确保层叠信息无误，点击ok

1. 点击Select Nets，选择参与仿真的电源和地网络

1. 自动跳转到Net Manager界面，本例中VCC和GND参与仿真，同时选中它们，右击选择Classify，As Power-Ground Pair，定义为电源地对

1. 结果如下

1. 回到workflow界面，点击Enable&Set Component Filtering Rules，使能器件过滤规则

1. 弹出如下界面，勾选Capacitors和IC Devices

默认C*都被视为电容

默认U*,A*,B*,Q*,P*都视为IC，本例中J是VRAM，注意将J*去掉

可以根据需要更改过滤规则

1. 设置好后点击ok

1. Merge Package through MCP（optional），只有需要连接其它模型才需要使用到，本例跳过

1. 点击Impedance Observations，设置阻抗观测点

1. 下方impedance observations会出现所有观测的器件，和IC过滤规则中设置的一样，所有J和U开头的器件都会观测

1. 点击Current Excitation，设置电流激励，Excitation Type选择Gaussian Pulse，Amp(电流幅值)默认为1，Pulse width(脉冲宽度) 为38ns，bandwidth(带宽为)50Mhz

用该高斯波形模拟噪声，后续报告中会显示U1这个端口的在噪声激励下的纹波电压

1. 点击下方的View Curve Frame，可以查看该波形的电压时域和频谱曲线

1. 结果如下，左边是时域，右边是频谱，点击Hide Curve Frame关闭曲线

1. 点击Target Impedance，选中U1_VCC_GND，在Target Impedance处点击E，加载目标阻抗曲线

1. 弹出文件选择界面，选中TargetZ_U1_VCC_GND.s1p，点击打开

1. 加载进来后，目标阻抗曲线如下图，1Mhz和10Mhz范围内，目标阻抗为1ohm

1. 点击VRM(optional)，设置VRAM

1. 弹出界面，选择Create by nets，然后点击下一页

1. Power Net选择VCC，Ground Net选择GND

1. 点击下一页

1. 弹出界面，选择J1

1. 然后点击下一页

1. J1就被定义为VRAM了，然后点击完成

1. VRAM的结果如下

1. 回到Workflow界面，点击Decoupling Capacitors，定义去耦电容

1. 下方出现Decoupling Capacitors界面，如下

1. 点击View Capacitor Library打开到library界面，找到和Decoupling Capacitors界面中对应的电容是哪个ID，本例中0402使用的是ID8,0603使用的是ID12

1. 定义好ID结果如下

1. 设置好后点击下方的ok

1. 如果电源经过了分离器件，比如电感，那么点击Workflow界面的Discretes(optional)，设置分离器件的参数，本例无需设置，跳过即可

1. 点击Frequency /Time Range，设置仿真频率范围

1. 弹出如下界面，开始频率设置为100khz，截止频率设置为1Ghz

1. 点击Analysis Type，设置分析类型

1. 选择Device optimization，进行device分析

1. 点击Device optimization parameters，进行Device参数设置

1. 参数设置界面如下，本例设置的Best Performance vs Cost，性能和成本进行比较

1. 切换到Decoupling capacitors界面，candidate Filter中替换的电容类型为相同size或者更小的size

1. 优化频率为100khz到100Mhz之间

1. 点击save as，保存worksapce

1. 点击保存

1. 点击Start Simulation开始仿真

1. 仿真结束后，结果如下

1. 回到workflow界面，点击Analysis Type界面

1. 选择Statistical Analysis

1. 点击ok

1. 点击Statistical Parameter，设置统计分析参数

1. 弹出如下界面

1. 勾选Optimum Default，选择scheme38进行统计分析

1. 点击Decoupling Capacitors，查看方案电容配置

Refdes是电容位号

Circuit Model是电容模型

Initial Scheme 是scheme38的电容ID，空白代表去掉了这个电容

Modified Scheme 是更新后电容ID，也是假设分析设置的参数

1. 保存workspace和SPD文件

1. 点击Start Simulation，开始仿真

1. 仿真结束后，结果如下

可以看到总共有3条曲线

U1—-Lower 正公差的阻抗曲线

U1—-Upper 负公差的阻抗曲线

U1---Nominal无公差的阻抗曲线

1. 是Confidence Interval置信区间，默认设置为3，Probality是概率，随着置信区间的数值自动变化

1. 调整不同置信区间的数值，概率会自动变化，随之阻抗曲线也会跟着自动变化

1. 点击Save Statisical Results，可以保存结果文件

1. 文件保存为StatisticalResult.dat文件，点击保存

1. Create Report是灰色的，不支持生成仿真报告

OptimizePI is a task-focused EDA solution specifically
for Power Delivery System (PDS) design. OptimizePI considers and minimizes end-product
manufacturing cost. It assists Power Integrity and Signal Integrity engineers to achieve lowcost
designs. It improves performance and reduces the area of PDS designs.
OptimizePI is based on industry leading power integrity and signal integrity numerical
analysis algorithms. These have been successfully applied by many PI and SI experts for
PCB, IC package and IC designs.
System Requirement
Refer to Installation Guide to check the system requirements.
How to Use This Guide
This manual describes in detail the features and functionality of OptimizePI.
Additional Documentation
In addition to this document, refer to the following documentation for additional information.
■ SPD Layout User’s Guide introduces the common features about layout settings of
Sigrity analysis tools
■ TCL Scripting Reference introduces TCL commands for Sigrity analysis tools
■ OptimizePI Tutorial guides user how to run OptimizePI step by step
■ PowerSI User’s Guide introduces the features, functionality and application of PowerSI
■ .spd File Format Reference Guide details our native .spd file formats
■ Translators User’s Guide describes translations from various types of board and package file
formats to Sigrity’s SPD format
OptimizePI is a comprehensive tool focusing on PDS analysis and optimization. Currently,
OptimizePI includes the following modules:
■ Post-Layout Analysis
? Device Optimization
? EMI Optimization
? What-if Analysis
? Statistical Analysis
■ Pre-Layout Analysis
? Device Optimization
? What-if Analysis
■ PDN Impedance Checking
? Device Impedance Checking
? EMI Impedance Checking
■ Capacitor to IC Device Loop Inductance Analysis
? Effective Radius of Capacitors
■ IC Device Power Pin Inductance Analysis
■ Best Capacitor Location Estimation
How Does OptimizePI Work?
It is important to understand the high level flow of OptimizePI before beginning to use the tool.
An initial PDS design that includes decap placement (location) and component selection must
be provided by the user. OptimizePI analytically determines which decaps must be placed at any or all of the original locations in the original design so that the best possible performance
is achieved at various cost levels.
OptimizePI does not require change of your present PCB design flow, since it optimizes your
post-layout design for minimum cost and maximum performance. OptimizePI also augments
your existing pre-layout PCB design flow with more detailed analysis. Cost reduction is
achieved by not placing decaps at some locations or selecting the appropriate combination
of cheaper or higher performance decaps. 

标签：界面,OptimizePI,阻抗,点击,Analysis,电容,Layout
From： https://blog.csdn.net/weixin_54787054/article/details/143767589