多层pcb,背地共面波导微带线:
建模时如下结构:Top+diel1+diel2+diel3+diel4+diel5,参考层都应该在diel内部,否则会出现如下报错:
[warning] Port refinement, process hf3d: All absorbing boundary conditions have been overridden, this will cause problems in linked projects. (1:00:44 下午 2月 02, 2023)
[error] Port refinement, process hf3d error: Port 1 does not have a solved inside material on either side.. Please contact ANSYS technical support. (1:00:44 下午 2月 02, 2023)
空气盒子自动设置:
create region
背地共面波导设置drivenTerminal
可以加一个0.03空隙的转接块,转接块将平面波导和背地连在一起,然后设置端口。
微带线 drivenTerminal TDR仿真阻抗偏低10-20Ω
迭代次数默认是6,迭代误差是0.1,大于设置的0.02;加大迭代次数可以让仿真结果逼真!
SetUp右键,查看收敛情况
微带线 driven Terminal和drivenModel 回损-25dB和-30dB@DC~10GHz
原因同上?
标签:迭代,汇总,HFSS,波导,报错,设置,微带线,Port From: https://www.cnblogs.com/deyicun/p/17086344.html