The ADSP-BF561 has 48 bi-directional, general-purpose I/O, Programmable Flag (PF47-0) pins. The Programmable Flag pins have special functions for SPI port operation. Each programmable flag can be individually controlled as follows by manipulation of the flag control, status, and interrupt registers:
- Flag Direction Control Register
- Flag Control and Status Registers - Rather than forcing the software to use a read-modify-write process to control the setting of individual flags, the ADSP-BF561 employs a "write one to set" and "write one to clear" mechanism than allows any combination of individual flags to be set or cleared in a single instruction, without affrecting the level of any other flags. Two control registers are provided, one register is written to in order to set flag values while another register is written to in order to clear flag values. Reading the flag status register allows software to interrogate
- Flag interrupt Mask Registers
- Flag interrupt Sensitivity Register
标签:control,set,ADSP,register,KIT,write,flag,PFx From: https://blog.51cto.com/u_15929756/5988600