内核文档
内核路径下的文档Documentation/DocBook/libata.tmpl
内核文档解释说明不同的reset调用对应的底层Error handler reset函数；
softreset&hardreset EH函数
在内核ata驱动中目前pata已经过时了，使用sata协议的硬盘需要使用AHCI协议作为上层接口协议，目前ata驱动框架需要调用libata库，scsi驱动，源码kernel/drivers/ata/libahci.c
而ahci作为上层驱动，作为底层驱动，定义ahci_ops后导出符号，在使用前声明即可
;//设置host controller CMD&CONTROL寄存器相关寄存器bit位
ata_tf_init(link->device, &tf);//初始化taskfile寄存器
tf.command = ATA_BUSY;
ata_tf_to_fis(&tf, 0, 0, d2h_fis);
sata_link_hardreset(link, timing, deadline, &online, ahci_check_ready);
1 sata_set_spd_needed(link) //判断该link是否需要应用SATA 速度配置
sata_scr_read(link, SCR_CONTROL, &scontrol)//判断CONTROL寄存器
scontrol = (scontrol & 0x0f0) | 0x304;
sata_scr_write(link, SCR_CONTROL, scontrol); //通过设置host controller让SATA interface处于Slumber&Partial关闭状态，无速度协商限制，让SATA接口关闭，port PHY处于离线状态
sata_set_spd(link);//将SCONTROL寄存器配置的link数据配置下去、
2 sata_scr_read(link, SCR_CONTROL, &scontrol); //再读SCR_CONTROL
scontrol = (scontrol & 0x0f0) | 0x301; //配置SCONTROL寄存器执行接口初始化建立PHY
通信，设置interface重启以及通信初始化
sata_scr_write_flush(link, SCR_SCONTROL, scontrol);//将SCONTROL配置数据刷新
ata_msleep(link->qp, 1);//按照协议进行1ms休眠
/* bring link back */
sata_link_resume(link, timing, deadline);//最多5次retry并消抖
if (ata_phys_link_offline(link))//检测判断link是否处于离线状态
if (sata_pmp_supported(link->ap) && ata_is_host_link(link)) //判断当前link是否支持PMP(端口倍增器功能)
if (check_ready) //判断link是否ready
ata_deadline(jiffies, ATA_TMOUT_PMP_WAIT);//设置deadline
if(time_after(pmp_deadline, deadline)) //判断pmp_deadline与deadline：若pmp_deadline在deadline之后返回TRUE；
pmp_deadline = deadline;
ata_wait_ready(link, pmp_deadline, cheakready);//等待link ready
if (check_ready)
ata_wait_ready(link, deadline, cheack_ready);//等待link ready
ahci_softreset函数
//libachi.c
sata_srst_pmp(link); //判断是否支持PMP&&该link为host_link
ahci_do_softreset(link, class, pmp, deadline, ahci__check_ready);
ahci_kick_engine(ap);
ahci_stop_engin(ap);//设置host controller CMD&CONTROL寄存器相关寄存器bit位
/* need to do CL0?
* always do CL0 if PMP is attached (AHCI-1.3 9.2)*/ //参考AHCI协议
if ( !ata_is_host_link(link) && pp->fbs_enabled)
ahci_disabled_fbs(ap);
fbs_disabled = true;
ata_tf_init(link->device, &tf);
/* issue the first D2H Register FIS */
tf.ctl = ATA_SRST;
if (ahci_exec_polled_cmd(ap, pmp, &tf, 0, AHCI_CMD_RESET | AHCI_CMD_CLR_BUSY, msecs))
ata_msleep(ap, 1);
/* issue the second D2H Register FIS */
tf.ctl &= ~ATA_SRST;
ahci_exec_polled_cmd(ap, pmp, &tf, 0, 0, 0);
/* wait for link to become ready */
rc = ata_wait_after_reset(link, deadline, check_ready);
if (rc == -EBUSY && hpriv->flags & AHCI_HFLAG_SRST_TOUT_IS_OFFLINE) //返回值错误&掉线
//掉线情况&设备未ready情况打印信息输出&goto对应处理
ahci_dev_classify(ap);//设备分类
if (fbs_disabled)
ahci_enable_fbs(ap);//开启fbs
##### 拓展-AHCI 1.3 9.2 Port Multiplier Enumeration
协议原文：
In order to enumerate a Port Multiplier, a software reset is issued to port 0Fh (control port) on the Port
Multiplier. If the signature returned corresponds to a Port Multiplier, then a Port Multiplier is attached. If
the signature returned corresponds to another device type, then a Port Multiplier is not attached.
To reliably enumerate the Port Multiplier, regardless of the presence of a device on Port Multiplier device
port 0, the PxCMD.CLO (command list override) bit should be used if this feature is supported by the HBA
(indicated by CAP.SCLO being set to ‘1’). Software should ensure that the PxCMD.ST bit is ‘0’. Then
software should construct the two Register FISes required for a software reset in the command list, where
the PM Port field value in the Register FIS is set to 0Fh. After constructing the FISes in the command list,
software should set PxCMD.CLO to ‘1’ to force the BSY and DRQ bits in the Status register to be cleared.
Then software should set the PxCMD.ST bit to ‘1’ and set appropriate PxCI bits in order to begin
execution of the software reset command.
If the CAP.SCLO bit is cleared to ‘0’, a Port Multiplier can only be enumerated after a device on Port
Multiplier device port 0 sends a Register FIS to the host that clears PxTFD.STS.BSY and
PxTFD.STS.DRQ to ‘0’.